diff options
author | Ian C <ianc@noddybox.co.uk> | 2016-04-17 22:47:10 +0100 |
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committer | Ian C <ianc@noddybox.co.uk> | 2016-04-17 22:47:10 +0100 |
commit | a8131ea5ed00c11517c2cb605834eb103ecac250 (patch) | |
tree | ad172298ea5d68e708eb232b07cea456ee413c86 /src/gbcpu.c | |
parent | 24ebb224a11d31bfe039352fd29d2b89368583ac (diff) |
Various fixes
* Added VCS example, which highlighted some bug in the zero page detection.
* 6502 fixes for the above. Still a problem with code generation.
* Updates to Gameboy code (example still not working in emulator).
* Fixed listing not being generated when enabled.
Diffstat (limited to 'src/gbcpu.c')
-rw-r--r-- | src/gbcpu.c | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/src/gbcpu.c b/src/gbcpu.c index a4fffe5..9f33bf5 100644 --- a/src/gbcpu.c +++ b/src/gbcpu.c @@ -819,6 +819,23 @@ static CommandStatus LD(const char *label, int argc, char *argv[], return CMD_OK; } + /* LD ($ff00 + n), A + */ + if (r1 == A8 && r2 == ADDRESS && off2 >= 0xff00) + { + PCWrite(0xf0); + PCWrite(off2 - 0xff00); + return CMD_OK; + } + + /* LD ($ff00 + n), A + */ + if (r1 == ADDRESS && r2 == A8 && off1 >= 0xff00) + { + PCWrite(0xe0); + PCWrite(off1 - 0xff00); + return CMD_OK; + } /* Custom opcode generation using the codes table */ @@ -1019,7 +1036,8 @@ static CommandStatus ADD(const char *label, int argc, char *argv[], static RegisterPairCodes codes[] = { A8, VALUE, {0xc6, WRITE_BYTE_RHS}, - A8, HL_ADDRESS, {0x86} + A8, HL_ADDRESS, {0x86}, + SP16, VALUE, {0xe8, WRITE_WORD_RHS} }; RegisterMode r1, r2; |