From 9b4f1b54a5b340ae094d33c7ef0eff49b86af489 Mon Sep 17 00:00:00 2001 From: Ian C Date: Tue, 3 May 2016 15:55:29 +0100 Subject: Updated documentation to include 65c816. --- doc/casm.html | 151 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 150 insertions(+), 1 deletion(-) (limited to 'doc/casm.html') diff --git a/doc/casm.html b/doc/casm.html index f7f05c2..469456a 100644 --- a/doc/casm.html +++ b/doc/casm.html @@ -154,6 +154,9 @@ http://www.gnu.org/licenses/gpl-3.0.html)

Gameboy Z80 - The Gameboy Z80 derivative processor.

+

+65c816 - 65c816 processor support, as used in the SNES. +

CASM

@@ -295,7 +298,7 @@ Sets the program counter (PC) to value. The PC defaults to zero on initialisation. If the optional second argument is passed the current memory bank in use is set to bank. Note that it also possible to set the bank by passing a 24-bit address. This was added for convenience when using the -65c618 processor. +65c816 processor. @@ -1240,6 +1243,15 @@ down to a single blank line in the listing.

Z80 CPU

+

Using the Z80

+ +The Z80 processor can be selected by passing z80 to the processor +directive, i.e. + +
+        processor z80
+
+

Opcodes

@@ -1341,6 +1353,15 @@ The Z80 assembler has no options.

6502 CPU

+

Using the 6502

+ +The 6502 processor can be selected by passing 6502 to the processor +directive, i.e. + +
+        processor 6502
+
+

Opcodes

The 6502 assembler uses the standard Motorola opcodes. @@ -1410,6 +1431,15 @@ e.g.

Gameboy Z80 derivative CPU

+

Using the Gameboy Z80 derivative

+ +The Gameboy Z80 derivative processor can be selected by passing gameboy +to the processor directive, i.e. + +
+        processor gameboy
+
+

Opcodes

@@ -1517,6 +1547,125 @@ it is used as an address: The Gameboy CPU assembler has no options. + +

65c816 CPU

+ +

Using the 65c816 processor

+ +The 65c816 processor can be selected by passing 65c816 +to the processor directive, i.e. + +
+        processor 65c816
+
+ +

Opcodes

+ +The 65c816 assembler uses the standard opcodes. As an addition some implicit +opcodes are generally followed by a byte that can be used, e.g. in the case +of a BRK interrupt. In these cases the following byte is automatically set to +zero unless a argument is supplied (in any addressing mode) and this is written +out as the following byte. e.g. + +
+    processor 65c618
+
+    brk          ; Produces the bytes 0x00 0x00
+    brk $ff      ; Produces the bytes 0x00 0xff
+
+    wdm          ; Produces the bytes 0x42 0x00
+    wdm $80      ; Produces the bytes 0x42 0x80
+
+ + +

Additional Directives

+ +The 65c618 assembler has some addition directives. As with the built-in +directives, these can be preceded by an optional period (.) character. + + + + + + + + + + + + + + + + + + + + + + + + + + + +
DirectiveDescription
+m8 + +Sets the assembler to produce 8-bit immediate values for the Accumulator in the +appropriate instructions. +
+m16 + +Sets the assembler to produce 16-bit immediate values for the Accumulator in the +appropriate instructions. +
+x8 + +Sets the assembler to produce 8-bit immediate values for the index registers X +and Y in the appropriate instructions. +
+x16 + +Sets the assembler to produce 16-bit immediate values for the index registers X +and Y in the appropriate instructions. +
+mx accumulator-size, index-size + +Sets the Accumulator and index register sizes for immediate values to either +8 or 16 bits. +
+ +

Options

+ +The 65c618 assembler has the following options. + + + + + + + + + + + + +
65c618 OptionDescription
+option a16, <on|off> + +Switches on or off the generation of 16-bit absolute values for the Accumulator. +Note that this can also be done using the directives described in the previous +section. +
+option i16, <on|off> + +Switches on or off the generation of 16-bit absolute values for the index +registers X and Y. +Note that this can also be done using the directives described in the previous +section. +
+ -- cgit v1.2.3